In this blog, we are going to look at the differences between the CISC and RISC processes. Before, we approach this topic in depth let’s understand what exactly is a processor.
A processor is basically nothing but the brain or the computing part of the computer. It takes instructions data as inputs. The instructions tell the processor what is it supposed to do with the data. This is nothing but manipulation of the data. Each processor has an instruction set. This is nothing but a collection of instructions or operations that can be performed by the processor.
Difference Between RISC and CISC Computer Architecture
Computer architecture can be classified into two types based on the instruction sets,
Before 1970, memory or RAM was slow and expensive and the programs were often written in high-level languages as obviously, they were more user-friendly. It was the job of the compiler to convert these high-level language instructions into lower-level counterparts for execution by a processor with an increase in the complexity of high-level languages. Designing a compiler became a tricky error-prone and tedious task. To make it easier there was a need to bridge the gap between high-level languages and computer architecture. thus it made absolute sense to have compact low-level instructions. These instructions not only occupied less space in memory but also simplified the task of designing a compiler.
let’s have a quick look at one such instruction now simply by typing one command multiple things are taken care of firstly the numbers from the specified memory locations are fetched then they are loaded implicitly into two separate registers and then multiplication is performed finally the result is stored in the appropriate memory location.
It is clearly, evident that compact instructions allow you to get more done with less. However, to support such instructions the silicon or the hardware underneath had to take the burden of execution which made it complex.
The idea, here was to move all the complexity to the hardware and make the software less demanding as the processor started supporting more and more diverse instructions. The processor designs started getting more and more complicated also more silicon was getting utilized to support these instructions which resulted in large and expensive processors. A high level of complexity also resulted in increased power consumption and heat dissipation.
Please note that the computer architects didn’t explicitly set out to create complex instruction set computers instead they naturally evolved due to the conditions existing at that time.
Interestingly, the term CISC was coined quite later when the idea of RISC or reduced instruction set computers came into the picture.
Now, let’s move into the early 1980s, it was discovered that 20 percent of the instructions were used 80 percent of the time in any given program. This means many complex instructions of CISC architecture were not being used. This realization led to a rethinking of the processor design. It made more sense to have an instruction set consisting of simple and only the most commonly used instructions. That’s how RISC or reduced instruction set computer architecture was conceptualized and the former architecture was referred to as CISC or complex instruction set computer as the overall processor design and instructions appeared complex in comparison with this architecture.
CISC-based computers have many instructions and occupy almost 1,200 pages. However, RISC-based computers have a reduced number of instructions usually less than 100 simple and less number of instructions making even the hardware less complicated.
The idea here was to take away the complexity from the hardware by putting more emphasis on the language compiler.
However, RISC-based instructions are simpler and generally of the same length thus they need only a few short clock cycles for completion which results in faster execution speeds.
As each instruction takes more or less the same time for execution. It is also possible to implement pipelining in the case of pipelining when one instruction is being executed next instruction is being decoded and the third one is being fetched all in one clock cycle this results in improved processor performance. In the case of CISC, the data was moved to and from the memory implicitly.
However, in the case of RISC, one has to load and store the operands explicitly by using load and store commands. one can easily observe that although the instructions are simple in the format you need more than one instruction as compared to CISC to get the desired result thus you need more memory or RAM to store these instructions.
The RISC-based compilers produced highly optimized code with smaller memory footprints which resulted in even better performance.
Now, CISC needed a large number of transistors to support complex instructions but we know that with reduced instructions of RISC the hardware was simpler to implement.
With the increase in the number of general-purpose registers, there is no need for the processor to access the main memory frequently.
Most of the instructions in CISC access the main memory which not only results in slower speeds but many complicated addressing modes.
In the case of RISC, variables that are used frequently are kept in the registers for fast access thus most of the instructions work on the registers only due to this most of the RISC instructions get executed in a single cycle and you don’t even have many complicated addressing modes.
Now, in the case of embedded systems applications RISC is preferred if you want to keep the power consumption low because due to the simpler hardware of RISC you get low power consumption thus it’ll be more useful in battery-powered devices and CISC would be an appropriate choice if there is a shortage of code space.
These are some examples of CISC processors,
- Motorola 68k
- x86 from intel
- PC and data center servers
These are some of the examples of RISC architecture,
The processors from apple and Qualcomm are used in tablets and smartphones. Basically, risk dominates in the mobile devices market and for embedded systems devices usually for lower power consumption.
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